A comprehensive guide to learning FPGA SoC development with the Intel Agilex 5 platform. This post covers the fundamental challenge every FPGA SoC developer faces: deciding what functionality goes in the Programmable Logic (PL) versus the Hard Processor System (HPS). Includes practical examples of building an ADC data acquisition system, testbench development, and SystemVerilog assertions for verification.

Key topics: PL vs HPS partitioning, Platform Designer, testbench structure, assertion-based verification, modular design patterns, and real-world ADC interface implementation.

A proven 10-step hardware design workflow refined over four decades of NPD — from defining requirements through documentation. Practical, not theoretical.

Key topics: Requirements Definition, Solution Research, Prototyping, Circuit Simulation, Firmware Development, Schematic & PCB Layout, Board Bring-Up, Testing, Design Iteration, and Documentation.